Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

Low Power Design with High-Level Power Estimation and Power-Aware Synthesis

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English
170 Pages

Description

This book presents novel research techniques, algorithms, methodologies and experimental results for high level power estimation and power aware high-level synthesis. Readers will learn to apply such techniques to enable design flows resulting in shorter time to market and successful low power ASIC/FPGA design.

Subjects

Informations

Published by
Published 22 October 2011
Reads 0
EAN13 9781461408727
Language English

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Low Power Design with High-Level Power Estimation and Power-Aware Synthesis