Emerging Memories. Technologies and Trends

Emerging Memories. Technologies and Trends




Emerging Memories: Technologies and Trends attempts to provide background and a description of the basic technology, function and properties of emerging as well as discussing potentially suitable applications.
With the many recent announcements of emerging memory technology development from large semiconductor companies, and with several start-up companies pursuing emerging memory products, there is considerable interest in the new technology.
Semiconductor memories have been around now for 30 years. They have increased fourfold in density about every three years from less than 1K-bit in 1972 to more than 1G-bit in 2002. Applications which historically permitted the technology to trade-off speed and power, now demand both high speed and low power. While the price has dropped from one dollar per 100 bits too less than one dollar per 100 megabits, the production technology has become so complex and expensive that the average multi billion-dollar company can no longer afford it. The circuits have reached geometries so small that semiconductor theories are being altered and fundamental limits are foreseen. While there are undoubtedly many years of life left in the old memory technology, the world is currently taking a hard look at whether there might be a better way.
This book explores a range of new memory products and technologies. The concept for some of these memories has been around for years. A few completely new. Some involve materials that have been in volume production in other type of devices for some time. Ferro-electrics, for example, have been used in capacitors for more than 30 years. In addition to looking at using known devices and materials in novel ways, there are new technologies being investigated such as DNA memories, light memories, molecular memories, and carbon nanotube memories, as well as the new polymer memories which hold the potential for the significant manufacturing reduction.
Emerging Memories: Technologies and Trends is a useful reference for the professional engineer in the semiconductor industry.



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Published 01 January 2002
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EAN13 0306475537
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Language English

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Ferroelectric RAMs .1Background of Ferroelectric Memory Technologies 1 1.2Basic Ferroelectric Technology 1 . 2 . 1The Ferroelectric Effect 1.2.2Properties of The Ferroelectric Capacitor 1.3Ferroelectric RAMs with 2T2C Cells 1.3.12T2Cferroelectric RAM Cell TechnologyOverview of 1.3.2Operation of a 2T2C Ferroelectric RAM Cell 1.3.3Characteristics of a 2T2C ferroelectric Memory 1.4Early Ferroelectric Memory Architectures 1.4.1Cross Point Matrix Array 1.4.2Ferroelectric Shadow R A M s 1.52T2C FeRAM Architectures 1.62T2C FeRAM to Other MemoriesComparison of 1.71T1C CellsFerroelectric RAMs with 1.7.1Cell Development and Operation 1.7.2Operation of a 1T1C Ferroelectric RAM cell: 1.8Evolution of 1T1C FeRAM Architectures 1.8.1An Early Basic 1T1C FeRAM Cell 1.9Reference Cells for the 1T1C FeRAM 1.9.1Ferroelectric Dummy Reference Cell 1.9.2Linear Capacitor Reference Cell 1.9.3 Variable Voltage Reference Using A Linear MOS Capacitor 1.9.4Fixed Voltage Reference Scheme 1.9.5Folded Bitline Architectures 1.9.6 SelfReference Scheme for a 1T1C FeRAM 1.10Cell Plate Configurations for the 1T1C FeRAM 1 . 1 0 . 1Hierarchical Plate Line with Divided Cell Plate 1.10.2Series Cell Plates
1 1 1 1 2 5 5 6 7 8 8 9 1 1 14 15 15 16 18 18 19 20 24 25 27 27 28 29 29 29
1.10.3Intermediate Voltage Plate FeRAM Cells 1.10.4Bitline Driven Read Scheme 1.11Novel Ferroelectric Cells 1.11.11T1C Ferroelectric for DRAM Backup 1.11.2Angled Capacitor Layout FeRAMS 1.11.31T2C Cells 1.12Ferroelectric Materials 1.12.1Ferroelectric MaterialsOverview of 1.12.2Common Ferroelectrics 1.12.3PZT 1.12.4SBT 1.12.5Epitaxial BST for Ferroelectric Memories 1.12.6(BLT) Thin Films 1.13Reliability Considerations in Ferroelectrics 1.13.1Data Retention 1.13.2Fatigue 1.13.3Imprint 1.13.4Detection of Defective or Weak Cells 1.13.5Redundancy Considerations 1.14Ferroelectric CapacitorsModeling and Simulation of 1.15Applications and Trends for Ferroelectric RAMs 1.15.1 Comparison of 1T1C FeRAM to other memories 1.15.2Products and Applications for the 2T2C Ferroelectric RAM 1.15.3Applications Forecast for 1T1C Ferroelectric RAMs 1.15.4Roadmap for Ferroelectric Memories 1.16The MFS FET Cell Bibliography
Magnetic RAMs 2.1Overview of Magnetic Memories 2.2Anisotropic Magnetic RAM 2.2.1Anisotropic MRAMOverview of 2.2.2AMRDevelopment of 2.3The GiantMagnetoResistive (GMR) Effect 2.4Spin Valve Cell and Operation 2.4.1Overview of Spin Valve MRAMS 2.4.2Development of the Spin Valve MRAM 2.4.3Reading the Spin Valve Cell 2.4.4Spin Valve GMR MRAM Characteristics 2.4.5Series Spin Valve Cell Architecture 2.4.6Spin Valve with Access Transistor Architecture
2.5PseudoSpin Valve MRAM Cell and Operation 2.5.1Overview of the Pseudo Spin Valve MRAM Cell 2.5.2Development of the PseudoSpin Valve MRAM Cell
31 36 37 37 38 38 39 39 39 40 42 44 45 45 45 48 49 50 50 52 52 52 53 55 57 58 62
69 69 70 70 70 73 76 76 76 78 79 82 84
85 85 85
2.5.3a Typical Pseudo Spin Valve MRAMOperation of 2.5.4Reading From a Pseudo Spin Valve MRAM 2.5.5Writing to a Pseudo Spin valve MRAM 2.5.6Pseudo Spin Valve MRAM Characteristics 2.6Issues for Pseudo Spin Valve MRAMs 2.6.1Endurance 2.6.2Thermal Stability 2.6.3Need to Scale the WordLine Field as the Cell is Scaled 2.6.4Bit End Shaping: 2.6.5Low Resistance 2.6.6Process and Manufacturing Issues 2.7Pseudo Spin Valve Architecture 2.8Spin Valve Models 2.9SpinValve Type MRAM Market and Application 2.9.1Spin Valve MRAMsSuppliers of 2.9.2Spin Valve MRAM Characteristics 2.9.3Potential Applications for GMR Spin Valve MRAM 2.10Other SpinValve MRAM Cells and Technologies 2.10.1Multibit Spin Valve Cell 2.10.2Multibit PseudoSpin Valve Cell 2.10.3 Spin Valve with GaAs Diode: 2.10.4 Curie Point Written MRAM 2.10.5 Diluted Magnetic Semiconductors 2.10.6 Vertical MRAM 2.10.7 Permanent RAM 2 . 1 1Magnetic Tunnel Junction Technology 2.12Magnetic Tunneling Junction Memory Cells 2.12.1Magnetic Tunneling Junction RAM Cross Point Cell 2.12.2Magnetic Tunneling Junction RAM Cells with Series Diode 2.13MTJ Cells With Series Transistors 2.13.1 Overview of MTJ Cells with Series Transistors 2.13.2Reading From an MTJ Cell with Series Transistor 2.13.3 Writing to an MTJ Cell with Series Transistor 2.13.4 Various Array Architectures for MTJ's 2.14Technical and Reliability Issues for the MTJ MRAM 2.14.1Complex metallurgy 2.14.2 Low voltage bias across the MTJ 2.14.3MTJ Resistance 2.14.4 Uniformity of the layer across the chip 2.14.5Tunneling Magnetoresistance (TMR) 2.14.6 Improved Thermal Stability of Thin Tunnel Barriers 2.14.7Magnetic Stability 2.14.8 Magnetic Bit Edge and End Effects 2.14.9 Interface Coupling Between Magnetic Layers 2.15Applications and Trends for Magnetic RAMs 2.15.1Characteristics of the MTJ MRAM
86 87 88 89 90 90 90 91 91 91 91 92 93 93 93 93 95 97 97 98 98 98 98 99 100 101 105 105 106 107 107 108 109 112 118 118 119 119 120 120 121 121 122 122 122 122
2.15.2Productization Trends for MTJ MRAM 2.15.3Potential Applications for MTJ MRAM 2.15.4Roadmap for MTJ MRAM : 2.16Hall Effect MRAM Cells Bibliography
123 124 126 127 128
NonVolatiles After Floating Gate133 3.1The Problem with Floating Gate Nonvolatile Memories133 3.2Multibit Memory Storage:134 3.3Proton Memory134 3.3.1Description of Proton Memory134 3.3.2Applications for The Proton Memory:136 3.4MONOS/SONOS Technology137 3.4.1Introduction to MONOS/SONOS Technology137 3.4.2Twin Split Gate MONOS138 3.4.3Two Bit per Cell MONOS/SONOS Technology140 3.5Single Electron Memories143 3.5.1Introduction to Single Electron Memories143 3.5.2Early Single Electron MemoriesConcepts of 144 3.5.3Change in Threshold Voltage due to charging of a Floating Nanodot147 3.5.4Fabrication Methods for Single Electron Floating Gate Memories148 3.5.5Simulations of Silicon QuantumDot Floating Gate Memories150 3.5.6Array Architecture for Floating Gate Single Electron Memories150 3.6Multiple Island Memories153 3.7Silicon Nanocrystals/Nanodots156 3.7.1Overview of Silicon Nanocrystals/Nanodots156 3.7.2Silicon Nanocrystal DevicesTheory of 156 3.7.3Silicon Nanocrystal Device Using a PMOS Transistor164 3.7.4Comparison of Implantation vs. Deposition of Silicon Nanocrystals166 3.8Alternative Nanocrystal Devices167 3.8.1Double Stacked Nanodots167 3.8.2Tin(Sn) Nanocrystals169 3.8.3a Sn Nanocrystal MemoryModel of 170 3.8.4Germanium Nanocrystals172 3.8.5Silicon Nanocrystals with OxideNitride Dielectrics173 3.9Manufacturing Techniques for Nanocrystals173 3.10Applications for Silicon Nanocrystal Memories178 Bibliography178
4After DRAM  Some Novel Contenders 4.1Overview 4.2The Single Electron Shutoff Memory 4.3The PLED Transistor Gain Cell 4.4Negative Resistance  DRAM Replacement 4.4.1Overview of Negative Resistance Memories
181 181 182 184 190 190
4.4.2Negative Resistance Memory Characteristics190 4.5The Esaki Diode191 4.6The Evolution of Resonant Tunneling Devices195 4.6.1the Resonant Tunneling DevicesBackground of 195 4.6.2Resonant Tunneling Diodes195 4.6.3Resonant Bipolar Tunneling Transistors196 4.6.4Room Temperature Resonant Bipolar Transistors199 4.6.5Multiple RTD's in Series200 4.7Making RTD's into Memories202 4.7.1RTD Memory With a Resistor Load202 4.7.2RTD Memory with a Constant Current Source Load203 4.7.3An RTD latch circuit206 4.7.4TSRAM Gain Cell Using HFET and RTD Latch209 4.7.5RTD TDRAM Gain Cell211 4.7.6Bipolar SRAM cell using multiple tunnel emitters212 4.7.7Other Integrated Memories with Resonant Tunneling Devices213 4.7.8Some Thoughts on Resonant Tunneling Device Memories215 4.8Resonant Interband Tunneling Devices (RITD)215 4.8.1Room Temperature RITD Technology Using SiGe:216 4.8.2Room Temperature RITD Technology using Silicon.217 4.8.3Interband Tunneling (IBTD) Memory Technology:220 4.8.4Comparison of PVCR and Current Density of Various Technologies224 4.9Using the Thyristor as a Negative Resistance Device225 4.9.1Overview of Thyristor Characteristics:225 4.9.2Thyristor RAM Cell Operation.225 4.9.3TechnologyThin Pillar 229 Bibliography231
Memories after Silicon 5.1Introduction and Overview 5.2Polymer Memory 5.2.1Overview 5.2.2Technology 5.2.3Market Trends and Applications for Polymer Memories 5.3Molecular Switch Memories 5.3.1Molecular SwitchesOverview of 5.3.2Technology 5.4Chalcogenic Memories 5.4.1Overview of Chalcogenic Memories 5.4.2Introduction to the Technology 5.4.3Various Memory Implementations 5.4.4Potential Production and Market Characteristics 5.5Carbon Nanotube Memories 5.5.1Overview of Carbon Nanotube Memories 5.5.2Simple Electronic Components from Carbon Nanotubes
235 235 236 236 237 248 249 249 249 254 254 254 255 257 258 258 258
5.5.3Micromechanical Nanotube Memories 5.6Other New Material Memories 5.6.1Photonic Memories 5.6.2DNA Memories 5.6.3Micromechanical Memory Bibliography
262 264 264 266 266 267