Hardware Simulator Tutorial

Hardware Simulator Tutorial

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Description

Hardware Simulator Tutorial
This program is part of the software suite
that accompanies the book
The Elements of Computing Systems
by Noam Nisan and Shimon Schocken
MIT Press
www.idc.ac.il/tecs
This software was devel
oped by students at the
Efi Arazi School of Com
puter
Science at IDC
Ch
ief Software Archit
ect: Yaron Ukrainitz
HW Simula
tor Tutori
al
www.idc.ac.il/tecs
Tutorial In
d
e
x
Slide 1/49 Background
The E
l
ements of
C
omp
ut
i
ng Sy
s
t
ems
evolves around
the
construction of a com
p
le
te
com
p
uter syste
m
,

do
ne
in the
framework o
f

a 1-
or 2-semester course.
In the
first part o
f
the
boo
k/course, we build the

ha
rdwa
re platform of a simple yet powerful
computer, called Hack. In
the
second part, we build
the computer’s software hiera
r
chy, consisting of an
asse
mbl
e
r, a virtual machine, a sim
p
le
Java-lik
e
language called Jack, a compiler for it, and a mini
operating system, written in Jack.
The book/course is completely self-contained,
requiring only p
r
ogrammi
ng as a pre-requisite.
The book’s web site in
cludes some 200 test
progra
ms, test scripts, and all the software
to
ols ne
cessary for doing all th
e projects.
HW Simula
tor Tutori
al
www.idc.ac.il/tecs
Tutorial In
d
e
x
Slide 2/49







The book’s software suite
(All the suppli
e
d tools are dual
-pl
atform:
Xxx.bat
st
arts
Xxx
in Windows, and
Xxx.sh
starts it in Unix)
Simulator
s
(
HardwareSimulator
,
CPUEmulator
,
VMEmulator
):
Used to ...

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Hardware Simulator Tutorial
This program is part of the software suite that accompanies the book
The Elements of Computing Systems by Noam Nisan and Shimon Schocken
MIT Press
www.idc.ac.il/tecs
This software was developed by students at the Efi Arazi School of Computer Science at IDC
Chief Software Architect: Yaron Ukrainitz
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Background
TheElementsofComputingSystemsevolvesaroundthe construction of a complete computer system, done in the framework of a 1- or 2-semester course. In the first part of the book/course, we build the hardware platform of a simple yet powerful computer, called Hack. In the second part, we build the computers software hierarchy, consisting of an assembler, a virtual machine, a simple Java-like language called Jack, a compiler for it, and a mini operating system, written in Jack. The book/course is completely self-contained, requiring only programming as a pre-requisite. The books web site includes some 200 test programs, test scripts, and all the software tools necessary for doing all the projects.
The book’s software suite (All the supplied tools are dual-platform:Xxx.batstarts Xxxin Windows, andXxx.shstarts it in Unix) Simulators (HardwareSimulator,CPUEmulator,VMEmulator): ƒUsed to build hardware platforms and execute programs; This tutorial isƒ us.Supplied b about they hardware simulator.Translators(Assembler,JackCompiler): ƒUsed to translate from high-level to low-level; ƒDeveloped by the students, using the book’s specs; Executable solutions supplied by us. Other ƒBin: simulators and translators software; ƒbuiltIn: executable versions of all the logic gates and chips mentioned in the book; ƒOS: executable version of the Jack OS; ƒTextComparer: a text comparison utility. HW Simulator Tutorial Indexwww.idc.ac.il/tecs TutorialSlide 3/49
The Hack computer
Thehardware simulatordescribed in this tutorial can be used to build and test many different hardware platforms. In this book, we focus on one particular computer, called Hack.
Hack -- a 16-bit computer equipped with a screen and a keyboard -- resembles hand-held computers like game machines, PDAs, and cellular telephones.
The first 5 chapters of the book specify the elementary gates, combinational chips, sequential chips, and hardware architecture of the Hack computer.
All these modules can be built and tested using thehardware simulatordescribed in this tutorial.
That is how hardware engineers build chips for real: first, the hardware s designed, tested, and optimized on a software simulator. Only then, the resulting gate logic is committed to silicon.
HW Simulator Tutorialc.ildc.aww.iwscet/
Tutorial Index
Slide 4/49
Hardware Simulation Tutorial
I.Getting started
II.Test scripts
III.Built-in chips
IV.Clocked chips
V.GUI-empowered chips
VI.Debugging tools
VII.The Hack Platform
Relevant reading (from “The Elements of Computing Systems”): ƒChapter 1:Boolean Logic ƒAppendix A:Hardware Description Language ƒAppendix B:Test Scripting Language
Appendix B:Test Scripting Language
HW Simulator Tutorial Indexwww.idc.ac.il/tecs Tutorial
Slide 5/49
Hardware Simulation Tutorial
HW Simulator Tutorialseccdi.wwwt/li.ca.
Part I:
Getting Started
Tutorial Index
Slide 6/49
chip interface
// Implementation missing.
}
ƒ
** Exclusive-or gate . out = a xor b */ HIP Xor { IN a, b; OUT out;
ƒ
Chip interface: ‰Name of the chip ‰Names of its input and output pins ‰Documentation of the intended chip operation Typically supplied by the chip architect; similar to an API, or a contract.
Chip Definition (.hdlfile)
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Chip Definition (.hdlfile)
ƒAny given chip can be implemented in several different ways. This particular implementation is based on:Xor(a,b) = Or(And(a,Not(b)), And(b,Not(a))) ƒNot,And,Or:Internal parts(previously built chips), invoked by the HDL programmer ƒnota,notb,w1,w2:internal pinscreated and named by the HDL programmer;, used to connect internal parts.
PARTS: Not(in=a, out=nota); Not(in=b, out=notb); And(a=a, b=notb, out=w1); And(a=nota, b=b, out=w2); Or(a=w1, b=w2, out=out);
}
** Exclusive-or gate . out = a xor b */ HIP Xor { IN a, b; OUT out;
chip interface
chip implementation
Loading a Chip
Navigate to a directory and select an.hdlfile.
HW Simulator Tutorialet/lscw.wwc.id.iac
Tutorial Index
Slide 9/49
S
Loading a Chip
ƒRead-only view of the loaded.hdlfile; ƒDefinesthechip logic; ƒTo edit it, use an external text editor.
ƒNames and current values of the chip’s internal pins (used to connect the chip’s parts, forming the chip’s logic); ƒCalculated by the simulator; read-only.
ƒNames and current values of the chip’s output pins; ƒCalculated by the simulator; read-only.
ƒNames and current values of the chip’s input pins; ƒTo change their values, enter the new values here.
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2. A table pops up, showing the chip’s internal parts (lower-level chips) and whether they are: ƒPrimitive (“given”) orcomposite (user-defined) ƒClocked (sequential) or unclocked (combinational)
1. Click the PARTS keyword
Exploring the Chip Logic
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