Spartan 3 decoder tutorial

Spartan 3 decoder tutorial

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Spartan 3 Decoder Tutorial EE574 Spartan 3 Starter Board Tutorial (Simple decoder Design synthesized and loaded to board) Jim Duckworth, January 2005, WPI. (updated September 2006 by Kahraman Akdemir for version 8.1ISE) Start Xilinx Project Navigator: Select File => New Project Select a project location and project name, for example: Click Next. Copyright © 2004 R James Duckworth 1 Rev B Spartan 3 Decoder Tutorial EE574 Select the device family, device, and package as shown below (this corresponds to the Spartan 3 device on the starter board: Click Next: Click New Source and enter decoder for the file name and select the VHDL module for the type of source: Copyright © 2004 R James Duckworth 2 Rev B Spartan 3 Decoder Tutorial EE574 Click Next. You can now specify the inputs and outputs for the decoder. We have one 3-bit input (sel) and one 8-bit output (y) as shown: Click Next A summary window opens: Copyright © 2004 R James Duckworth 3 Rev B Spartan 3 Decoder Tutorial EE574 Click Finish Click Next We do not need to add any existing sources so click Next A final summary window is shown: Copyright © 2004 R James Duckworth 4 Rev B Spartan 3 Decoder Tutorial EE574 Click Finish Project Navigator now shows your project including a top level VHDL file for the decoder. You can close the Design Summary window shown below, and you will have the decoder.vhd file instead. ...

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Spartan 3 Decoder Tutorial
Spartan 3 Starter Board Tutorial (Simple decoder Design synthesized and loaded to board) Jim Duckworth, January 2005, WPI. (updated September 2006 by Kahraman Akdemir for version 8.1ISE) Start XilinxProject Navigator:
SelectFile => New Project Select a project location and project name, for example:
ClickNext.
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Select the device family, device, and package as shown below (this corresponds to the Spartan 3 device on the starter board:
ClickNext:
ClickNew Sourceand enterdecoderfor the file name and select theVHDL modulefor the type of source:
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ClickNext. You can now specify the inputs and outputs for the decoder. We have one 3bit input (sel) and one 8bit output (y) as shown:
ClickNext A summary window opens:
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ClickFinish
ClickNext
We do not need to add any existing sources so clickNext A final summary window is shown:
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ClickFinish Project Navigator now shows your project including a top level VHDL file for the decoder. You can close the Design Summary window shown below, and you will have the decoder.vhd file instead.
We now need to describe the behavior of the decoder using statements in the architecture body. In this example we will use a conditional signal assignment statement:
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Before we can synthesize this design we need to specify what pins on the FPGA the inputs and outputs are connected to. There are a number of ways to do this. 1)Click on theAssign Package Pinsprocess in the left middle window, under User Constraints. Note: You will be asked to save the file and your design will be checked for syntax errors (these will need to be fixed before you can proceed). The tools will prompt you to create a UCF file:
ClickYes The following window opens, Under IO pins section, enter the I/O Locations.
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2) Or create a text file called decoder.ucf
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Once you have saved the UCF file, go back and select the decoder source in the top left pane. Before we can load the design into the board we need to configure the JTAG connection. Rightclick on theGenerate Programming Fileprocess in the process window. Select theStartup Optionstab and change theFPGA StartUp Clockto JTAG clock as shown:
ClickOK. Select theConfigure Device (iMPACT)under theGenerate Programming Fileprocess in the process window. Make sure your board is powered up and the JTAG cable is connected.
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The following window will come up. In the iMPCAT window; double click on the “Boundary Scan” under the “Flows” pane.
In this window that comes up, right click and say “Initialize chain”
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The FPGA will be highlighted in the main window (“xc3s200”). Select thedecoder.bitfile for the first device (the FPGA) in the chain. ClickOpen
A new dialog box opens for the second device (the PROM). ClickBypass:
Rightclick on the first device (the FPGA) and selectProgram.
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TheProgramming Propertiesdialog box opens. ClickOK
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